1. Field of the Invention
The present invention relates generally to communication systems, and more particularly, to a channel communication apparatus and method for inserting side information in a communication system.
2. Description of the Related Art
In general, voice data and messaging information may be transmitted over a traffic channel. In particular, the forward traffic channel is used to transmit user data, voice and signaling messages. For example, in addition to transmitting data, a channel transmitter of a forward link will transmit side information such as power control information. A channel receiver separates the data and side information from the received information. For efficient reverse transmission power control, the power control command is transmitted without channel encoding and should be delivered within a short delay. In this case, power control commands transmitted from the transmitter should be demodulated within a short delay. Hereinafter, for ease of explanation, it will be assumed that the side information is a power control bit and the communication system is a CDMA (Code Division Multiple Access) communication system.
Since the power control bit is not encoded, the channel transmitter should transmit it with a power different from that of other data. As a result, the spectrum characteristic may deteriorate because of the disparity in power levels between the data and the power control bit. Therefore, the position of the power control bit to be transmitted is randomly changed. Changing the position of the power control bit requires that coded data to be transmitted is randomly punctured to allow the power control bit to be inserted into the punctured position, thereby degrading channel encoded data.
FIG. 1 illustrates a fundamental channel transmitter of a base station of a CDMA communication system in accordance with the prior art. In operation, a cyclic redundancy check (CRC) generator 111 adds a 12-bit CRC to data to be transmitted. A tail bit generator 113 adds an additional eight tail bits to the CRC added data so that an encoder 115 can initialize the data as a frame unit. For example, if data having a bit length of 172 bits is input to the CRC generator 111, data generated from the tail bit generator 113 is 192 bits. That is, the 192 bits output from the tail bit generator represent the sum of the original 172 data bits plus 12 bits of CRC and an additional 8 bits generated in the tail bit generator. The encoder 115 encodes the 192 bits received from the tail bit generator 113 to generate 576 symbols per frame. An interleaver 117 interleaves the encoded data generated from the encoder 115.
A bit selector 121 decimates a long code generated from a long code generator 119 to equalize the symbol rate between the long code and the interleaved data. An XOR (Exclusive OR) gate 123 generates a scrambled signal by XORing the interleaved data with the decimated long code. A signal mapping 125 demultiplexes the output of the XOR 123 to generate odd data as a first channel (I channel) signal and even data as a second channel (Q channel) signal, and changes the generated signal “0” to “+1” and “1” to “−1”. The channel signals generated from the signal mapping 125 are supplied to first and second data channel gain controllers 127 and 129 where their gains are controlled.
A power control (PC) bit is applied to a PC gain controller 131 where the gain controlled PC bit applied to first and second puncturers 133 and 135. The puncturers 133 and 135 puncture data situated at a position designated by a control signal generated from the bit selector 121 and insert the gain controlled PC bit outputted from the PC gain controller 131 into the punctured position. The outputs of the puncturers 133 and 135 are supplied to first and second multipliers 139 and 141 where they are multiplied by an orthogonal code generated from an orthogonal code generator 137 and then transmitted as orthogonally modulated signals.
The existing IS-95 standard uses 20 ms frames each having 16 1.25 ms power control groups. One power control bit is inserted into each power control group after data puncturing. The insert position is determined by the 4 least significant bits of a long code generated for the previous power control group duration.
FIG. 2 illustrates a block diagram of a structure for inserting the side information in the fundamental channel transmitter of FIG. 1.
Referring to FIG. 2, if input data is M bits per frame and a coding rate of an encoder 202 is r, (M/r) symbols per frame are generated from the encoder 202. A side information generator 206 generates N symbols per frame as side information. A puncturing position selector 208 generates a select control signal designating a position into which the side information is inserted. A multiplexer (MUX) 210 punctures a symbol, among the symbols generated from an interleaver 204 situated at the position designated by the select control signal and inserts the side information into the punctured position.
In operation, the input data of M bits/frame is encoded in the encoder 202 whose coding rate is r and output as data of (M/r) symbols per frame. The encoded data is interleaved in the interleaver 204 and then supplied to the MUX 210. The side information of N symbols per frame generated from the side information generator 206 is also supplied to the MUX 210. The puncturing position selector 208 generates the select control signal for selecting one of the two MUX 210 inputs. If the select control signal is sourced from the puncturing position selector 208, the MUX 210 outputs the side information, otherwise the MUX 210 outputs the encoded data output from the interleaver 204.
FIG. 3 is a block diagram of a fundamental channel receiver for extracting the side information from the received data.
A demodulator 311 demodulates the received channel data. An inserting position selector 313 generates a select control signal designating a position into which the power control bit is inserted. A demultiplexer (DEMUX) 315 extracts data symbols from the demodulator 311 output. The extracted data symbols are supplied to a deinterleaver 317. The extracted side information is supplied to a processor for processing the side information (e.g., the power control bit) for reverse channel transmission power control. The deinterleaver 317 deinterleaves the symbols generated from the DEMUX 315. A channel decoder 319 decodes the deinterleaved data symbols to convert them into original data. The converted data is supplied to a signal processor.
In the power control bit inserting method described above, the interleaved data symbols are randomly punctured. As a result, the performance of the channel code is degraded in comparison with that of a systematically punctured code.